Epson C82363 Specifications download pdf (Page 25)

LQ-2180 Revision A

Operating Principles Control Circuit 25

2.1 Control Circuit

The control circuit of the LQ-2180 is composed of the C272MAIN board

and the C165PNL board. This section describes the operations of the

major components in the circuit.

2.1.1 Overview of the Control Circuit Operation

The printer's control circuit includes a CPU (TMP96C141AF/IC4) that

runs at 19.66 MHz, a gate array (E05B42/IC3), a 1M bit PS-RAM (IC8),

a 8M bit CG-ROM (IC6), and so on. The figure below shows the block

diagram for the control circuit.

Figure 2-1. Control Circuit Block Diagram

The following figure shows the data flow from the host computer to the

printhead. Data sent from the host computer is converted to image data

and transmitted to the printhead through the gate array.

Figure 2-2. Data Flow

IC 7 (not m ounted)

IC 6 (8 M C G )*1

IC 8 (1 M P S -R A M )

C 165 PN L board

C N 1 (P a ra lle l I/F )

C N 2 (Type B I/F)

CN14 (Serial I/F)

C N 17 (Fan)

CN6 (PE-Front)

IC 4 (TM P 96C )

CN5 (PE-Rear)

C N 7 (Top)

CN4 (CRHP)

C N 16(R elease2)

C N 12(R elease1)

CN13(PG1)

IC 2(P S T592)

IC 11(S LA 7024M )

CN11(CR)

IC 12(A 2917)

C N 10(P F )

C N 3 (fro m P S )

IC 3 (E 05B 42)

CN8

Tr.(Q 4-25)

CN9

IC 5(AT93C 45)

Address

IC10 (8M P-ROM)

*1: O nly for K orea and Thai versions

Data

Print data

conversion 2

CPU

TM P 96C 141

RAM

G a te A rra y

E05B42

Printhead drive

circuit

In p u t

B u ffe r

Im age

B u ffe r

Line Edit

B u ffe r

Print data

conversion 1

D a ta la tc h

a n d

data output

Im a g e d a ta

tra n s fe r

O ption I/F

P a ra lle l I/F

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Epson C82363 Specifications Page 25

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