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Epson S1C33210 manuals

Owner’s manuals and user’s guides for Computers Epson S1C33210.
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Epson S1C33210 User Manual (559 pages)


Brand: Epson | Category: Computers | Size: 3.57 MB |

 

Table of contents

S1C33210

1

2002 All rights reserved

2

S1C33210 Technical Manual

3

S1C33210 PRODUCT PART

5

Table of Contents

5

S1C33210 FUNCTION PART

7

TABLE OF CONTENTS

10

EPSON vii

11

PRODUCT PART

13

1 Outline

15

External bus interface

16

Supply form

16

1.3 Pin Description

18

SS 3, 22, 39, 54, 67, 90

19

1 OUTLINE

20

EPSON A-7

21

EPSON A-9

23

2 Power Supply

25

2 POWER SUPPLY

26

3 Internal Memory

27

4 Peripheral Circuits

28

4.2 I/O Memory Map

29

4 PERIPHERAL CIRCUITS

30

EPSON A-17

31

EPSON A-19

33

EPSON A-21

35

EPSON A-23

37

EPSON A-25

39

EPSON A-27

41

EPSON A-29

43

EPSON A-31

45

EPSON A-33

47

EPSON A-35

49

EPSON A-37

51

EPSON A-39

53

EPSON A-41

55

EPSON A-43

57

EPSON A-45

59

EPSON A-47

61

EPSON A-49

63

EPSON A-51

65

EPSON A-53

67

EPSON A-55

69

EPSON A-57

71

EPSON A-59

73

EPSON A-61

75

5 Power-Down Control

76

7 Precautions on Mounting

80

A/D Converter

81

Arrangement of Signal Lines

81

8 Electrical Characteristics

82

DD 2.70 – 3.60 V

83

I VSS –VDD V

83

CPU ––50MHz

83

OSC1 – 32.768 – kHz

83

8.3 DC Characteristics

84

8.4 Current Consumption

85

ZS 024LSB

86

FS -2 – 2 LSB

86

L -3 – 3 LSB

86

D -3 – 3 LSB

86

Integral linearity error

87

Differential linearity error

87

8.6 AC Characteristics

88

DD to VSS voltage range

89

Item Symbol Min. Max. Unit ∗

89

Common characteristics

90

SRAM read cycle

90

SRAM write cycle

90

8 ELECTRICAL CHARACTERISTICS

92

(wait cycle)

93

(last cycle)

93

(C1 only)

93

DRAM fast-page access cycle

95

EDO DRAM page access cycle

96

DRAM self-refresh cycle

97

Burst ROM read cycle

97

OSC1 crystal oscillation

99

OSC3 crystal oscillation

99

OSC3 ceramic oscillation

99

8.8 PLL Characteristics

100

9 Package

101

10 Pad Layout

102

10.2 Pad Coordinate

103

EPSON S1C33210 PRODUCT PART

106

A.1 DRAM (70ns)

107

RPC tCSR tCHR

109

A.2 DRAM (60ns)

110

EPSON A-97

111

A.3 ROM and Burst ROM

114

A.4 SRAM (55ns)

116

A.5 SRAM (70ns)

118

A.6 8255A

120

Pin Characteristics

121

EPSON A-109

123

THIS PAGE IS BLANK

124

FUNCTION PART

125

I OUTLINE

127

I-1 INTRODUCTION

129

I-2 BLOCK DIAGRAM

131

C33 Core Block

132

C33 Peripheral Block

132

C33 Analog Block

132

C33 DMA Block

132

C33 Memory Block

132

I-3 LIST OF PINS

133

I OUTLINE: LIST OF PINS

134

EPSON S1C33210 FUNCTION PART

134

EPSON B-I-3-3

135

OSC3) fout (fPSCIN)

137

II CORE BLOCK

139

II-1 INTRODUCTION

141

II-2 CPU AND OPERATING MODE

143

Standby Mode

144

Test Mode

145

Debug Mode

145

Trap Table

146

EPSON B-II-2-5

147

II-3 INITIAL RESET

149

Power-on Reset

150

Reset Pulse

150

Boot Address

151

II-4 BCU (Bus Control Unit)

153

User interface signals

154

Memory Area

156

Exclusive Signals for Areas

159

Area 10 boot mode

160

Area 10 memory map

160

Setting Device Type and Size

161

Wait cycles

162

Output disable delay time

163

Burst mode

163

Bus Operation

164

EPSON B-II-4-13

165

Bus Clock

168

Bus Speed Mode

169

Bus Clock Output

169

SRAM Read Cycles

170

Bus Timing

171

Write cycle with wait mode

173

Burst read cycle

174

Wait cycles during burst read

174

Write cycle to burst ROM area

174

DRAM Direct Interface

175

DRAM Setting Conditions

176

Column address size

177

Refresh enable

177

Refresh method

177

Refresh RPC delay

178

Refresh RAS pulse width

178

CAS cycle control

178

RAS cycle control

178

DRAM Read/Write Cycles

179

DRAM random write cycle

180

EPSON B-II-4-29

181

CAS-before-RAS refresh cycle

182

Self-refresh

182

Releasing External Bus

183

I/O Memory of BCU

185

EPSON B-II-4-35

187

AxxDF1 AxxDF0 Delay time

189

EPSON B-II-4-39

191

RCA1 RCA0 Column address size

192

RRA1 RRA0 Pulse width

193

RPRC1 RPRC0 Number of cycles

195

CASC1 CASC0 Number of cycles

195

RASC1 RASC0 Number of cycles

195

Programming Notes

198

Maskable Interrupts

199

Contents of table

200

Nonmaskable Interrupt (NMI)

201

EPSON B-II-5-5

203

Interrupt factor flag

204

Interrupt enable register

205

IDMA Invocation

207

Interrupt after IDMA transfer

208

HSDMA Invocation

209

EPSON B-II-5-13

211

EPSON B-II-5-15

213

EPSON B-II-5-17

215

EPSON B-II-5-19

217

EPSON B-II-5-21

219

EPSON B-II-5-23

221

II-6 CLG (Clock Generator)

225

Controlling Oscillation

227

CLKDT1 CLKDT0 Division ratio

228

Operation in Standby Mode

229

I/O Memory of Clock Generator

230

II-7 DBG (Debug Unit)

235

III PERIPHERAL BLOCK

237

III-1 INTRODUCTION

239

III-2 PRESCALER

241

Bit setting 76543210

242

I/O Memory of Prescaler

243

EPSON B-III-2-5

245

Data bus

249

EPSON B-III-3-3

251

Setting the input clock

252

Timer RUN/STOP control

253

Reading out counter data

254

Control of Clock Output

255

Intelligent DMA

256

High-speed DMA

257

Trap vectors

257

EPSON B-III-3-13

261

EPSON B-III-3-15

263

A/D converter start trigger

269

Watchdog timer

269

Setting pin for input/output

270

Setting comparison data

271

Resetting the counter

272

Reading counter data

272

Controlling Clock Output

273

Precautions

274

Precaution

277

EPSON B-III-4-19

285

EPSON B-III-4-21

287

III-5 WATCHDOG TIMER

293

Operation in Standby Modes

294

I/O Memory of Watchdog Timer

295

Pin name I/O Function

297

Oscillator Types

298

III-7 CLOCK TIMER

305

Initial setting

306

Resetting the counters

306

RUN/STOP the clock timer

307

Interrupt Function

308

I/O Memory of Clock Timer

311

EPSON B-III-7-11

315

III-8 SERIAL INTERFACE

317

I/O Pins of Serial Interface

318

Setting Transfer Mode

319

Clock-Synchronized Interface

320

Setting input/output pins

321

Setting the interface mode

321

Setting the transfer mode

321

Transmit control

323

Receive control

325

EPSON B-III-8-11

327

Asynchronous Interface

328

Setting the data format

332

EPSON B-III-8-17

333

EPSON B-III-8-19

335

IrDA Interface

337

IRMDx1 IRMDx0 Interface mode

338

When transmitting

339

When receiving

339

Receive-completion interrupt

340

Receive-error interrupt

340

EPSON B-III-8-33

349

EPSON B-III-8-35

351

EPSON B-III-8-37

353

SMDx1 SMDx0 Transfer mode

355

EPSON B-III-8-43

359

EPSON B-III-8-45

361

DD for K60–K63

363

Input-Port Pins

364

Notes on Use

364

I/O Memory of Input Ports

365

I/O Ports (P Ports)

366

EPSON B-III-9-5

367

I/O Memory of I/O Ports

368

EPSON B-III-9-9

371

Input Interrupt

373

Key Input Interrupt

375

Selecting input pins

376

Interrupt SPPK settings

382

EPSON B-III-9-21

383

CLG section for details

386

Features

387

RXD (RXD input pin)

388

TXD (TXD output pin)

388

DCD (DCD input pin)

388

EPSON B-III-10-3

389

List of Pin Functions

390

Operating Clock

390

Communications Mode

391

PHS Signal Format

391

UART Communications Mode

393

PDC Communications Mode

394

¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥¥

395

Transmit Control

396

Receive Control

396

Interrupt Outputs

396

PHS Communications Mode

397

Data Buffers

398

FCS (CRC) Checking

398

Output Port Control

398

Input Port Monitoring

398

HDLC Communications Mode

400

EPSON B-III-10-17

403

Overview

404

EPSON B-III-10-19

405

EPSON B-III-10-21

407

EPSON B-III-10-23

409

EPSON B-III-10-29

415

EPSON B-III-10-31

417

EPSON B-III-10-33

419

EPSON B-III-10-35

421

EPSON B-III-10-37

423

EPSON B-III-10-41

427

Important Notes on Debugging

428

IV ANALOG BLOCK

429

IV-1 INTRODUCTION

431

IV-2 A/D CONVERTER

433

I/O Pins of A/D Converter

434

Setting A/D Converter

435

Selecting a trigger

436

Setting the sampling time

436

Sampling Conversion

437

Terminating A/D conversion

438

Trap vector

440

Timers"

441

TS1 TS0 Trigger

443

ST1 ST0 Sampling Time

445

V DMA BLOCK

449

V-1 INTRODUCTION

451

V-2 HSDMA (High-Speed DMA)

453

I/O Pins of HSDMA

454

Address mode

455

Transfer mode

455

Transfer data size

455

Block length

456

Transfer counter

456

Trigger Factor

460

Operation of HSDMA

461

Successive transfer mode

462

Block transfer mode

463

#DMAENDx signal output

464

Timing Chart

465

Single-address mode

466

Interrupt Function of HSDMA

467

I/O Memory of HSDMA

469

EPSON B-V-2-21

473

EPSON B-V-2-23

475

EPSON B-V-2-25

477

EPSON B-V-2-27

479

DxMOD1 DxMOD0 Mode

483

SxIN1 SxIN0 Address control

483

EPSON B-V-2-33

485

V-3 IDMA (Intelligent DMA)

489

Word Bit Name Function

490

EPSON B-V-3-3

491

EPSON B-V-3-7

495

Operation of IDMA

496

Software-triggered interrupts

501

EPSON B-V-3-15

503

Appendix I/O MAP

507

APPENDIX: I/O MAP

510

EPSON B-APPENDIX-3

511

EPSON B-APPENDIX-5

513

EPSON B-APPENDIX-7

515

EPSON B-APPENDIX-9

517

EPSON B-APPENDIX-11

519

EPSON B-APPENDIX-13

521

EPSON B-APPENDIX-15

523

EPSON B-APPENDIX-17

525

EPSON B-APPENDIX-19

527

EPSON B-APPENDIX-21

529

EPSON B-APPENDIX-23

531

EPSON B-APPENDIX-25

533

EPSON B-APPENDIX-27

535

EPSON B-APPENDIX-29

537

EPSON B-APPENDIX-31

539

EPSON B-APPENDIX-33

541

EPSON B-APPENDIX-35

543

EPSON B-APPENDIX-37

545

EPSON B-APPENDIX-39

547

EPSON B-APPENDIX-41

549

EPSON B-APPENDIX-43

551

EPSON B-APPENDIX-45

553

EPSON B-APPENDIX-47

555

Epson IS energy savings

558

Technical Manual

559




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