Epson S1D13504 manuals

Epson S1D13504 User Manual (504 pages)

Brand: Epson | Category: Networking | Size: 4.51 MB |

English

Table of contents

S1D13504

1

TECHNICAL MANUAL

1

Customer Support Information

3

GRAPHICS

5

Vancouver Design Center

10

THIS PAGE LEFT BLANK

12

List of Tables

13

2 Features

18

2.4 Display Modes

19

2.5 Clock Source

19

2.6 Miscellaneous

19

2.7 Package and Pin

19

4 Block Description

23

4.2.4 Look-Up Table

24

4.2.5 LCD Interface

24

4.2.6 Power Save

24

S1D13504F00A

25

S1D13504F01A

26

S1D13504F02A

27

5.4 Pin Description

28

5.4.1 Host Interface

28

“Register Mapping”

29

“Summary of

30

Configuration Options”

30

5.4.3 LCD Interface

33

5.4.4 Clock Input

33

Interface Pin Descriptions

34

5.4.6 Miscellaneous

36

5.4.7 Power Supply

36

or IO V

38

if not used

38

Format 1

39

Format 2

39

6 D.C. Characteristics

40

7 A.C. Characteristics

42

7.2 Clock Input Requirements

52

7.3 Memory Interface Timing

53

7.3.1 EDO-DRAM Read Timing

53

7.3.2 EDO-DRAM Write Timing

55

7.3.6 FPM-DRAM Read Timing

61

7.3.7 FPM-DRAM Write Timing

63

7.4 Display Interface

69

7.4.1 Power-On/Reset Timing

69

7.4.2 Suspend Timing

70

Figure 7-38: TFT A.C. Timing

90

7.4.13 CRT Timing

92

Figure 7-40: CRT A.C. Timing

93

8 Registers

96

(ValueOfTheseBits + 6)

97

9 Display Buffer

120

9.1 Image Buffer

121

9.2 Half Frame Buffer

121

10 Display Configuration

122

10.2 Image Manipulation

124

11 Clocking

125

11.2 Frame Rate Calculation

126

1 Bit-Per-Pixel Mode

128

Figure 12-2: 2 Bit-Per-Pixel

129

Figure 12-3: 4 Bit-Per-Pixel

129

12.2 Color Display Modes

130

2 Bit-Per-Pixel Color Mode

131

4 Bit-Per-Pixel Color Mode

132

8 Bit-Per-Pixel Color Mode

133

13 Power Save Modes

134

14 Mechanical Data

136

TQFP15 - 128 pin Unit: mm

137

QFP20 - 144 pin Unit: mm

138

Table Of Contents

141

List Of Tables

143

List of Figures

143

1 Introduction

145

2.1.5 REG[23] Display FIFO:

147

2.2 Register Initialization

147

3 Display Buffer

150

3.3 Look-Up Table (LUT)

153

(binary)

158

4 Advanced Techniques

161

4.1.1 Registers

162

4.1.2 Examples

162

4.2 Panning and Scrolling

163

4.2.1 Registers

164

4.2.2 Examples

165

4.3 Split Screen

166

4.3.1 Registers

166

4.3.2 Examples

167

5.3 Registers

168

5.4 Suspend Sequencing

169

6 CRT Considerations

171

6.1.2 Simultaneous Display

172

7 Identifying the S1D13504

176

8.2.2 Screen Manipulation

179

8.2.3 Color Manipulation

185

8.2.4 Drawing

188

9 Sample Code

192

A.1 Supported Panel Values

199

Table 9-3: TFT Panel

200

Bit 9 Bit 8

201

13504CFG.EXE Configuration

203

Table of Contents

206

13504CFG.EXE

210

Program Requirements

211

Script Mode

212

Interactive Mode

213

Figure 2: 13504CFG Open File

214

Files Menu

215

View Menu

216

Device Menu

218

Advanced Memory

223

Power Management

225

Lookup Table (LUT)

227

Figure 23: 13504CFG Setup

229

Help Menu

230

Comments

231

Sample Program Messages

231

13504SHOW

235

Program Messages

236

13504SPLT Display Utility

237

13504SPLT

239

13504SPLT Example

240

13504VIRT Display Utility

243

13504VIRT

245

13504VIRT Example

246

13504PLAY Diagnostic Utility

249

13504PLAY

251

H [lines]

253

Q - Quits this utility

253

13504BMP

257

Sequencing Utility

259

13504PWR

261

Examples

262

13504DCFG

271

13504DCFG Configuration Tabs

272

General Tab

273

Memory Tab

274

Clocks Tab

275

Panel Tab

277

Figure 5: CRT Tab

279

Defaults Tab

280

Registers Tab

281

Miscellaneous Flags Tab

282

Saving to a File

283

Windows® CE Display Drivers

285

WINDOWS® CE DISPLAY DRIVERS

287

Example Installation

292

Board User Manual

307

317

6 Technical Description

319

6.2 Non-ISA Bus Support

320

6.3 DRAM Support

320

6.4 Decode Logic

320

6.5 Clock Input Support

320

6.16 Schematic Notes

323

7 Parts List

324

8 Schematic Diagrams

326

Evaluation Board User Manual

333

2.1.2 LCD Display Support

341

2.1.4 CRT Support

343

3 D9000 Specifics

344

3.1.2 Bus Interface Timing

349

3.1.4 Makefpga file

349

3.2 Board Dimensions

349

3.4 Parts List

350

3.5.1 PCB Layout

355

3.5.2 Component Placement

355

3.5.3 Perspective View

356

Power Consumption

357

1 S1D13504 Power Consumption

359

2 Summary

360

PR31500/PR31700 Processor

361

4.1 Hardware Description

371

4.3 S1D13504 Configuration

373

PR31500/PR31700

375

S1D13504 Hardware

377

Functional Specification

377

5.3 IT8368E Configuration

378

5.5 S1D13504 Configuration

380

6 Software

381

7 References

382

8 Technical Support

383

Microprocessor

385

2.1.1 Overview

392

4.3 NEC V

398

4102™ Configuration

398

5 Software

399

6 References

400

7 Technical Support

401

2 Interfacing to the MCF5307

410

2.2 Chip-Select Module

412

3 S1D13504 Bus Interface

413

4.1 Hardware Connections

415

4.3 Memory/Register Mapping

417

2 Interfacing to the MC68328

428

System RESET

432

2 Interfacing to the MPC821

446

2.3 Memory Controller Module

449

4.2 Hardware Connections

454

4.4 Register/Memory Mapping

457

4.6 Test Software

458

2.1 The PC Card System Bus

470

4.3 PAL Equations

476

TX3912 Processor

481

2 Interfacing to the TX3912

488

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